What is PCIe 6.0 and how is it different?

PCIe 4.0 motherboards are just now shipping to customers, but that’s not slowing the development of this critical peripheral standard. PCIe 6.0 is already on the table, with concrete improvements compared to the current advanced standard.

As PCIe becomes fundamental in computers of all shapes and sizes, it’s worth talking about what PCIe is, what it’s used for, and what the new PCIe 6.0 will offer in the future.

The basics of PCIe

PCIe is an abbreviation for: Peripheral Component Interconnect Express† Some of our readers who have been around computers for a while may remember the old PCI standard, but PCIe is to the original PCI standard like a fighter jet is to a paper airplane.

PCIe is both a protocol and a physical hardware connection standard. The most common PCIe hardware connection standard is the motherboard expansion slot. You connect expansion cards to these slots and communication takes place via the connection pins. However, it is possible to send PCIe protocol signals over other types of connections.

NVME SSDs using the M.2 connector can use PCIe, and this doesn’t seem to be any different from an SSD’s computer connected through a standard PCIe slot. The Thunderbolt 3 and 4 standards also support transmitting PCIe signals over a cable. For example, eGPUs (external graphics cards) are possible.

PCIe devices transmit data in a serial manner, but over multiple, parallel lanes. An x16 PCIe slot on a computer motherboard can accommodate sixteen data channels simultaneously. PCIe also offers x8, x4, and x1 slots. In general, graphics cards use the x16 slot because they need as much bandwidth as possible. While slower slots are usually physically shorter, it is common for x16 lengths to be next to the primary x8.

PCIe cards offer backwards compatibility and cross-compatibility, allowing you to insert an x4 card into any PCIe slot that will physically fit inside. You’re just wasting all the PCIe lanes that the x4 card isn’t using. The same applies to the use of a PCIe 5.0 card in, for example, a 4.0 slot. It will work, but be limited to the lowest common denominator.

Who decides on the PCIe standard?

The PCI Express standard was designed and approved by the PCI Special Interest Group (PCI-SIG), a consortium of members from the electronics and computer industries with a vested interest in the technology.

PCI-SIG was founded in 1992 as a group to help computer manufacturers correctly implement the Intel PCI standard. Today it is a non-profit organization with over 800 members.

The PCI-SIG board has AMD, ARM, Dell, IBM, Intel, Nvidia, Qualcomm and more members. You may recognize these names as major computer equipment manufacturers, and having a shared standard makes their jobs much easier, not to mention their customers’ lives!

What is PCIe used for?

We’ve already mentioned expansion cards and SSDs above, so you probably have a general idea of ​​how to use PCIe.

The PCIe standard connects to just about any external peripheral you can think of. It offers much greater bandwidth than USB, especially if you’re looking at multiple lanes. PCIe also provides a direct path to the CPU, making it perfect for high-speed, low-latency applications.

Modern GPUs use sixteen lanes of PCIe bandwidth to maximize their performance, but not every peripheral needs that much bandwidth. The latest PCIe 4.0 SSDs use “only” four lanes, but that’s enough to blow the SATA standard out of the water. While SATA reaches 600 MB/s, high-end PCIe 4.0 drives can move more than 7000 MB/s.

PCIe expansion cards also accommodate sound cards, video capture cards, 10Gb Ethernet adapter, WiFi 6 cards, Thunderbolt or USB controllers and more. Peripherals integrated into your computer’s motherboard also use PCI Express. Only the wiring is permanent and not in the form of a slot.

How does PCIe 6.0 improve on PCIe 5.0?

The main improvement is usually a big jump in data speed with each PCIe revision. That is the amount of information that can be moved through the bus every second.

In that department, PCIe 6.0 doesn’t disappoint. It fully doubles the already massive data transfer rate of PCIe 5.0 from 32 Gigatransfers per second (GT/s) to 64 GT/s per lane. While PCIe 5.0 could shift 63 gigabytes per second (GB/s), 6.0 can shift up to 128 GB/s. That’s more than an x16 connection, with smaller smaller connections. It means that an x8 PCIe 6.0 slot now has the same performance as an x16 5.0 slot.

This creates plenty of headroom for future GPUs and ultra-fast storage solutions. Not to mention the incredible possibilities for external devices connected via PCIe or expansion cards that Thunderbolt and USB 4 offer.

New Features in PCI Express 6.0

Making such a monumental leap in achievement in one generation was not easy. To achieve these numbers, the PCI-SIG engineers had to develop some innovative new ways to move electrons.

PAM4 signaling

Perhaps the most significant change with PCIe 6.0 compared to previous generations of the interface is the way data is encoded.

PCI Express 6.0 uses PAM4, which is short for: Four-level pulse amplitude modulation. If you know anything about electrical waveforms, you know that the wave’s “amplitude” is how far the wave’s crest is from the baseline.

Legacy NRZ (Non-return-to-zero) PCIe encoding had only two amplitude levels per pulse during a clock cycle. PCIe 6 doubles that to four, increasing the amount of data encoded on each cycle.

Forward Error Correction (FEC)

While the PAM4 encoding method offers a significant increase in speeds, it also offers a big boost to bit errors. In other words, one arrives at one’s destination instead of a zero, and vice versa.

To counteract this, PCIe 6.0 has a new Forward Error Correction feature, which checks that data ends up in the right place without getting corrupted, using a robust CRC (Cyclic Redundancy Check) implementation.

One danger of adding more error correction steps in the pipeline is that you add more latency. Extra latency is a growing problem with various high-speed computing components. Although they can move more and more data, it takes longer for them to respond to a request for data, which in itself can cause problems.

FEC is designed to add no more than two nanoseconds of latency compared to previous versions of PCIe, which is a tiny bit of extra latency that no human can detect.

FLIT mode

FLIT mode was another measure introduced to improve error correction in PCIe 6.0. It organizes data into units of uniform size using a special onboard power control unit. This is necessary to check packets for errors, as you can apply an algorithm to any data packet and check if the packet still returns the result when it reaches the other end of the pipeline.

The thing is, FLIT mode delivers significant efficiency gains in other places as well. It helps lower latency, makes bandwidth usage more efficient, and lets PCIe 6.0 remove much of the encryption overhead of previous versions. So while PAM4 delivers 2ns of latency, FLIT mode saves on latency in other areas.

L0p mode

An interesting feature in PCIe 6.0 is L0p mode. This mode reduces the number of lanes a peripheral uses to send and receive data. So if your laptop is running on battery power and the GPU doesn’t need 16 lanes to do its current job, it will fall back to just the number of lanes it needs, saving electricity by increasing power efficiency.

Should you wait for PCIe 6.0?

If you’re considering buying or building a new computer soon, should you wait for PCIe 6.0 motherboards to come out first? It’s always tempting to try and build a future-proof computer. What if a new GPU or SSD comes out that requires PCIe 6.0 to reach its full potential?

The short answer to this question is that you don’t have to worry about waiting for PCIe 6.0. At the time of writing, PCIe 5.0 motherboards have only just started rolling out to consumers, and even the most advanced current GPUs are far from needing PCIe 5.0.

In benchmarks if you compare flagship cards like the RTX 3080 or RTX 3090 on PCIe 3.0 and 4.0, the performance difference was somewhere between nothing and 3%. Yes that’s right. We’re just now reaching the limits of PCIe 3.0, and that’s only with the world’s most expensive GPUs. Don’t worry about it – at least not for a few years.

Please note that PCI-SIG has not published their final PCIe specification for version 6.0 until paperwork. While the final spec won’t change, it will be some time before we see a lot of hardware that supports it, at least in the consumer space.

Benefits of PCIe 6.0 for Data Centers Today

That’s not to say that PCIe 6.0 isn’t already beneficial to someone. In the giant data centers we all rely on cloud-based services, every extra bit of bandwidth is precious. In those racks of computers, you’ll find systems with tens or hundreds of CPU cores and arrays of fast SSD storage. The improvements in PCIe bandwidth will immediately help take the pressure off those burdensome data pipes.

With so much more bandwidth, AI and machine learning applications can analyze more data in less time. It implies that High-Performance Computing (HPC) applications that do complex work in science, engineering and physics can broaden their horizons.

Even Internet of Things (IoT) systems that send a torrent of data to data centers to process in real time will benefit immensely from the extra bandwidth.

What comes after PCI Express 6.0?

PCIe technology will be around for a long time, unless someone invents a peripheral interconnect technology that is radically better. Companies like Intel, AMD and Apple are doing exciting things with the related technologies between chips in their processor packages. With CPUs like AMD’s Ryzen and Intel’s Alder Lake filled to the brim with CPU cores, they have to move a huge amount of data. We are sure that the PCI-SIG can learn a few things from what goes on in these processors.

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